IoT in the CMOS Era and Beyond: Leveraging Mixed-Signal Arrays for Ultra-Low-Power Sensing, Computation, and Communication

Energy efficiencies obtained by analog processing are critical for next-generation “smart” sensory systems that implement intelligence at the edge. Such systems are widely applicable in areas like biomedical data acquisition, continuous infrastructure monitoring, intelligent sensor networks, and data analytics. However, adaptive analog computing is sensitive to nonlinearities induced by mismatch and noise, which has limited the application of analog signal processing to signal conditioning prior to quantization. This has relegated the bulk of the processing to the digital domain, or a remote server, limiting the system efficiency and autonomy.  This talk highlights principled techniques to algorithm-circuit co-design to overcome these obstacles, leading to energy-efficient high-fidelity mixed-signal computation and adaptation.

First, I will provide analytical bounds on the energetic advantages derived by alleviating the need for highly accurate and energy-consuming analog-to-digital conversion through high-resolution analog pre-processing. I will then present an embodiment of this principle in a micropower, multichannel, mixed-signal array processor developed in 65nm CMOS. Spatial filtering with the processor yields 84 dB in analog interference suppression at only 2 pJ energy per mixed-signal operation. At the algorithmic level, I will present work on a gradient-free variation of coordinate descent, Successive Stochastic Approximation (S2A). S2A is resilient to the adverse effects of analog mismatch encountered in compact low-power realizations of high-resolution, high-dimensional mixed-signal processing systems. Over-the-air experiments employing S2A in non-line-of-sight demonstrate adaptive beamforming achieving 65 dB of processing gain.

I will conclude with my vision about the impact of mixed-signal processing on the next generation of computing systems and share my recent work spanning across devices (RRAM), architectures (compute-in memory) and emerging applications (neuromorphic computing). Crossing these hierarchies is critical to leverage emerging technologies in realizing the next generation of sensing, computing, and communicating systems.